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| PD- 91316F IRLR/U3303 HEXFET(R) Power MOSFET l l l l l l l Logic-Level Gate Drive Ultra Low On-Resistance Surface Mount (IRLR3303) Straight Lead (IRLU3303) Advanced Process Technology Fast Switching Fully Avalanche Rated D VDSS = 30V G S RDS(on) = 0.031 ID = 35A Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The D-PAK is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D -P ak T O -252 A A I-P ak T O -25 1A A Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, V GS @ 10V Continuous Drain Current, V GS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 35 25 140 68 0.45 16 130 20 6.8 5.0 -55 to + 175 300 (1.6mm from case ) Units A W W/C V mJ A mJ V/ns C Thermal Resistance Parameter RJC RJA RJA Junction-to-Case Case-to-Ambient (PCB mount)** Junction-to-Ambient Typ. --- --- --- Max. 2.2 50 110 Units C/W ** When mounted on 1" square PCB (FR-4 or G-10 Material ) . For recommended footprint and soldering techniques refer to application note #AN-994 www.irf.com 1 9/28/98 IRLR/U3303 Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Min. Typ. Max. Units Conditions 30 --- --- V V GS = 0V, ID = 250A --- 0.035 --- V/C Reference to 25C, ID = 1mA --- --- 0.031 VGS = 10V, ID = 21A --- --- 0.045 VGS = 4.5V, ID = 17A 1.0 --- --- V VDS = VGS, ID = 250A 12 --- --- S VDS = 25V, ID = 20A --- --- 25 VDS = 30V, VGS = 0V A --- --- 250 VDS = 24V, VGS = 0V, TJ = 150C --- --- 100 VGS = 16V nA --- --- -100 VGS = -16V --- --- 26 ID = 20A --- --- 8.8 nC VDS = 24V --- --- 15 VGS = 4.5V, See Fig. 6 and 13 --- 7.4 --- VDD = 15V --- 200 --- ID = 20A ns --- 14 --- RG = 6.5, VGS = 4.5V --- 36 --- RD = 0.70, See Fig. 10 Between lead, --- 4.5 --- nH 6mm (0.25in.) G from package --- 7.5 --- and center of die contact --- 870 --- VGS = 0V --- 340 --- pF V DS = 25V --- 170 --- = 1.0MHz, See Fig. 5 D S Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Notes: Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 35 showing the A G integral reverse --- --- 140 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 20A, V GS = 0V --- 72 110 ns TJ = 25C, IF = 20A --- 180 280 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) VDD = 15V, starting TJ = 25C, L =470H RG = 25, I AS = 20A. (See Figure 12) ISD 20A, di/dt 140A/s, VDD V(BR)DSS, TJ 175C Pulse width 300s; duty cycle 2%. Caculated continuous current based on maximum allowable This is applied for I-PAK, LS of D-PAK is measured between lead and center of die contact. junction temperature; Package limitation current = 20A. Uses IRL3303 data and test conditions. 2 www.irf.com IRLR/U3303 1000 TO P VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOT TOM 2.5V 1000 ID , D ra in -to -S o u rc e C u rren t (A ) 100 ID , D rain-to-S ourc e C urrent (A ) 100 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP 10 10 2 .5V 1 1 2.5V 0.1 0.1 1 2 0 s P U LS E W ID TH T J = 25 C 10 100 A 0.1 0.1 1 2 0 s P U LS E W ID TH T J = 1 75 C 10 100 A V D S , D rain-to-S ource V oltage (V ) V D S , D rain-to-S ource V oltage (V ) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 2.0 R D S (on) , Drain-to-S ource O n Resistance (N orm alized) I D = 3 4A I D , D rain-to-So urce C urren t (A ) 100 1.5 TJ = 2 5 C TJ = 1 75 C 10 1.0 1 0.5 0.1 2 3 4 5 6 V DS = 1 5V 2 0 s P U L S E W ID TH 7 8 9 10 A 0.0 -60 -40 -20 0 20 40 60 80 V G S = 10 V 100 120 140 160 180 A V G S , G ate -to -So urce Volta ge (V ) T J , Junction T em perature (C ) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRLR/U3303 1600 1400 1200 1000 800 600 C oss V G S , G a te-to-S ou rc e V o ltag e (V ) V GS C is s C rs s C iss C o ss = = = = 0V , f = 1M H z C g s + C g d , Cd s S H O R T E D C gd C d s + C gd 15 I D = 2 0A V D S = 24 V V D S = 15 V 12 C , C apacitance (pF) 9 6 C rss 400 200 0 1 10 100 3 A 0 0 10 20 FO R TE S T CIR C U IT S E E FIG U R E 1 3 30 40 A V D S , D rain-to-S ource V oltage (V ) Q G , T otal G ate C harge (nC ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 I S D , R everse Drain C urrent (A ) O P E R A TIO N IN TH IS A R E A L IM ITE D B Y R D S (o n) I D , Drain C urrent (A ) 100 100 10 s T J = 17 5C T J = 25 C 10 100 s 10 1m s 1 0.0 0.5 1.0 1.5 V G S = 0V 2.0 A 1 1 T C = 25 C T J = 17 5C S ing le P u lse 10 10m s 2.5 A 100 V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V oltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRLR/U3303 35 LIMITED BY PACKAGE 30 VDS VGS RG RD D.U.T. + I D , Drain Current (A) 25 -VDD 20 4.5V Pulse Width 1 s Duty Factor 0.1 % 15 10 Fig 10a. Switching Time Test Circuit VDS 5 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 10 Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.10 0.05 P DM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.1 0.02 0.01 0.01 0.00001 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRLR/U3303 300 E A S , S ingle P ulse A valanche E nergy (m J) TO P 250 1 5V B O TTO M ID 8.3 A 14 A 2 0A VDS L D R IV E R 200 150 RG 20V tp D .U .T IA S + V - DD A 100 0 .0 1 Fig 12a. Unclamped Inductive Test Circuit 50 0 V D D = 15 V 25 50 75 100 125 150 A 175 V (B R )D SS tp S tarting T J , J unc tion T em perature (C ) Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F 10 V QGS VG QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com IRLR/U3303 Peak Diode Recovery dv/dt Test Circuit D.U.T + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRLR/U3303 Package Outline TO-252AA Outline Dimensions are shown in millimeters (inches) 2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 ) 6 .7 3 (.2 6 5 ) 6 .3 5 (.2 5 0 ) -A5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 4 1 .2 7 (.0 5 0 ) 0 .8 8 (.0 3 5 ) 1 .1 4 (.0 4 5 ) 0 .8 9 (.0 3 5 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) 6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 6 .2 2 (.2 4 5 ) 5 .9 7 (.2 3 5 ) 1.0 2 (.0 4 0 ) 1.6 4 (.0 2 5 ) 1 2 3 0 .5 1 (.0 2 0 ) M IN . 1 0 .4 2 (.4 1 0 ) 9 .4 0 (.3 7 0 ) L E A D A S S IG N M E N T S 1 - GATE 2 - D R A IN 3 - S OU R CE 4 - D R A IN -B 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 3X 2X 1 .1 4 (.0 4 5 ) 0 .7 6 (.0 3 0 ) 2 .2 8 ( .0 9 0 ) 4 .5 7 ( .1 8 0 ) 0 .8 9 (.0 3 5 ) 0 .6 4 (.0 2 5 ) 0 .2 5 ( .0 1 0 ) M AMB N O TE S : 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) 1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A . 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X. + 0 .1 6 (.0 0 6 ) . Part Marking Information TO-252AA (D-PARK) EXAM PLE : TH IS IS AN IR FR 120 W ITH ASSEM BLY LO T C OD E 9U 1P IN TER N ATIO N AL RE CTIFIE R LO G O A IR FR 120 9U 1P FIR ST PO R TIO N OF PAR T N U MBER ASSEM BLY L O T C OD E SEC O ND PO R TIO N O F PAR T NU M BER 8 www.irf.com IRLR/U3303 Package Outline TO-251AA Outline Dimensions are shown in millimeters (inches) 6 .7 3 (.26 5 ) 6 .3 5 (.25 0 ) -A 5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 4 1 .2 7 ( .0 5 0 ) 0 .8 8 ( .0 3 5 ) 2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) L E A D A S S IG N M E N T S 1 - GATE 2 - D R A IN 3 - SOURCE 4 - D R A IN 6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 1 -B 2.2 8 (.0 9 0) 1.9 1 (.0 7 5) 9 .6 5 ( .3 8 0 ) 8 .8 9 ( .3 5 0 ) 2 3 6 .2 2 ( .2 4 5 ) 5 .9 7 ( .2 3 5 ) N O TE S : 1 D IM E N S IO N IN G & TO L E R A N C IN G P E R A N S I Y 1 4 .5M , 19 8 2 . 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R MS TO J E D E C O U T L IN E TO -2 5 2 A A . 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X. + 0.1 6 (.0 0 6 ). 3X 1 .1 4 (.0 45 ) 0 .7 6 (.0 30 ) 3X 0 .8 9 (.0 35 ) 0 .6 4 (.0 25 ) M AMB 1 .1 4 ( .0 4 5 ) 0 .8 9 ( .0 3 5 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) 2 .28 (.0 9 0 ) 2X 0 .2 5 (.0 1 0 ) Part Marking Information TO-251AA (I-PARK) EXAM PLE : TH IS IS AN IR FU 12 0 W ITH ASSEM BLY LO T C O D E 9U 1 P IN TE RN ATION AL R EC TIFIER LO GO IR FU 12 0 9 U 1P FIR ST PO RTION O F PAR T N U M BER AS SEMBL Y LO T C O D E SEC O N D PO R TIO N O F PAR T N U MB ER www.irf.com 9 IRLR/U3303 Tape & Reel Information TO-252AA Dimensions are shown in millimeters (inches) TR TRR TRL 1 6.3 ( .641 ) 1 5.7 ( .619 ) 16 .3 ( .641 ) 15 .7 ( .619 ) 12 .1 ( .4 76 ) 11 .9 ( .4 69 ) F E E D D IR E C T IO N 8.1 ( .318 ) 7.9 ( .312 ) F E E D D IR E C T IO N NO T ES : 1. C O N T R O LL IN G D IM E N S IO N : M ILLIM E T E R . 2. A LL D IM E N S IO N S A R E S H O W N IN M ILL IM E T E R S ( IN C H E S ). 3. O U T L IN E C O N F O R M S T O E IA -4 81 & E IA -54 1. 13 IN C H 16 m m NOTES : 1. O U T LIN E C O N F O R M S T O E IA -481 . WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936 http://www.irf.com/ Data and specifications subject to change without notice. 9/98 10 www.irf.com |
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